Power electronic traction transformers in 25 kV / 50 Hz systems: Optimisation of DC/DC Isolated Converters with 3.3 kV SiC MOSFETs

2021-08-11T16:54:55+02:00May 9th, 2019|Electronique de puissance & convertisseurs, Publications|

In AC electric trains, power electronic traction transformers (PETT) are multilevel single phase AC/DC converters connected to the AC medium voltage overhead line. For indirect topologies, DC/DC isolated converters are key elements of PETTs. This paper shows a method to design such DC/DC converters, and several variants are considered. Finally, the comparison results, in the case of a 25 kV / 50 Hz power supply and 3.3 kV SiC MOSFETs, show that the variant with a resonant AC link, with only one controlled bridge and a switching frequency lower than the resonant frequency, offers the best efficiency at rated power for a given volume.

A New Energy Management Control of Modular Multilevel Converters for Coping with Voltage Stress on Sub-Modules

2023-01-31T13:26:55+01:00April 24th, 2019|Appareillage électrique haute tension, Publications|

This paper investigates the impact of the operating condition on the SM voltage ripples. In particular, it is revealed that under the classical control scheme where the Modular Multilevel Converter internal energy varies naturally with the DC grid voltage, the traditional sizing approach based on the analytical expression of instantaneous SM voltage may fail to respect the SM voltage constraint. To tackle this problem, this paper presents a solution by incorporating the advantages of the explicit energy management and the developed analytical expressions of the SM voltage ripple, which achieves a better utilization of the converter asset.

Packaging Solution for SiC Power Modules with a Fail-to-Short Capability

2021-08-11T16:55:16+02:00March 16th, 2019|Electronique de puissance & convertisseurs, Publications|

Fail-to-short packages, which can still carry current after the failure of their semiconductor devices, are required for HVDC applications. However, all existing solutions are dedicated to silicon components. Here, a fail-to-short package is proposed for SiC devices. Its manufacturing process is described. 4 modules are built and submitted to intense short circuit currents (up to 2000 A). It is found that they offer a stable short-circuit failure mode, providing that the modules are mechanically clamped to prevent separation during the surge current test.

FMEA of a non-selective fault-clearing strategy for HVDC grids

2021-08-11T16:55:33+02:00February 7th, 2019|Architecture & systèmes du supergrid, Publications|

The Failure Mode Effect Analysis (FMEA) is a technique used to investigate failures in a process or component and to identify the resultant effects of these failures on system operations. In this paper it is explained how the FMEA can be used to define and assess the impact of the failure modes (FM) of a protection strategy for High Voltage Direct Current (HVDC) grids.

Study of the impact of DC-DC converters on the protection strategy of HVDC grids

2021-08-11T16:55:54+02:00February 7th, 2019|Electronique de puissance & convertisseurs, Publications|

This paper studies the role of DC-DC converters in the protection of HVDC grids acting as firewalls to stop the propagation of faults. The effects of blocking the converter or actively controlling its operation during faults are presented.The results demonstrate the capabilities of DC-DC converters beyond DC voltage transformation.

25 kV-50 Hz railway power supply system emulation for Power-Hardware-in-the-Loop testings

2021-08-11T16:56:14+02:00January 8th, 2019|Electronique de puissance & convertisseurs, Publications|

This paper presents a methodology to consider the impedance of a grid in power hardware in the loop (PHIL) experiments to validate power converter control in presence of harmonics or resonances in the network impedance. As the phenomena to emulate are in a large frequency range, the skin effect in conductors has to be taken into account. A procedure is developed to model the network.

Modelling of a 25 kV-50 Hz railway infrastructure for harmonic analysis

2021-08-11T16:56:29+02:00December 20th, 2018|Electronique de puissance & convertisseurs, Publications|

This paper presents a methodology for the modelling of a 25 kV-50 Hz railway infrastructure, for frequencies from 0 to 5 kHz. It aims to quantify the amplifications of current and voltage harmonics generated by on-board converters into the infrastructure. A circuit is developed to model the skin effect in the overhead line for time-domain simulations. A new approach, based on state space representation and transfer functions, is also proposed to analyse the interactions between trains.

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